Design and modeling of low power VLSI systems
Analyses various traditional and modern low power techniques for integrated circuit design in addition to the limiting factors of existing techniques and methods for optimization. It presents a research-based discussion of the technicalities involved in the VLSI hardware development process cycle
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| Other Authors: | , , |
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| Format: | Book |
| Language: | English |
| Published: |
Hershey, PA
Engineering Science Reference, an imprint of IGI Global
[2016]
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| Series: | Advances in computer and electrical engineering (ACEE) book series
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| Subjects: | |
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Table of Contents:
- Low power design techniques: classical and beyond CMOS era / Mohd Samar Ansari, Shailendra Kumar Tripathi
- Low power strategies for beyond Moore's Law era: low power device technologies and materials / B. Shivalal Patro, Vandana B.
- Challenges and limitations of low power techniques: low power methodologies in analog and digital circuits / Vandana B., Patro B. S.
- Leakage minimization in CMOS VLSI circuits: a brief review / Saurabh Chaudhury, Rohit Lorenzo
- Contemporary low power design approaches / Lini Lee
- Low power VLSI circuit design using energy recovery techniques / V. S. Kanchana Bhaaskaran
- State-of-the-art master slave flip-flop designs for low power VLSI systems / Kunwar Singh, Satish Chandra Tiwari, Maneesha Gupta
- Signal-adaptive analog-to-digital converters for ULP wearable and implantable medical devices: a survey / Nabi Sertac Artan
- The design of ultra low power RF CMOS LNA in nanometer technology / Kavyashree P., Siva S. Yellampalli
- Low power arithmetic circuit design for multimedia applications / Senthil C. Pari
- Case study: system on a chip for electric stimulation / Martha Salome Lopez
- Low power design of high speed communication system using IO standard technique over 28 nm VLSI chip / Bhagwan Das, Mohammad Faiz Liew Abdullah