Verilog digital system design RT level synthesis, testbench, and verification
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| Main Author: | |
|---|---|
| Format: | Book |
| Published: |
New York
McGraw-Hill
c2006
|
| Edition: | 2nd ed |
| Series: | McGraw-Hill electronic engineering
|
| Subjects: | |
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| Call Number : | TK7885.7 .N36 2006 |
MARC
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| 020 | 0 | 0 | |a 9780071445641(hbk) |
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| 090 | 0 | 0 | |a TK7885.7 |b .N36 2006 |
| 100 | 1 | 0 | |a Navabi |h Zainalabedin |
| 245 | 1 | 0 | |a Verilog digital system design |b RT level synthesis, testbench, and verification |c Zainalabedin Navabi |
| 250 | 0 | 0 | |a 2nd ed |
| 260 | 0 | 0 | |a New York |b McGraw-Hill |c c2006 |
| 300 | |a xvi,384p. |b ill. |c 24cm |e 1 CD-ROM (4 3/4 in.) | ||
| 490 | 0 | 0 | |a McGraw-Hill electronic engineering |
| 504 | 0 | 0 | |a Includes bibliographical references and index |
| 591 | |a 0000006725 |b 04/12/08 |c 0200-07 |d 1 |e RM325.89 |f 1 |g 325.89 |h YUHA Associates Sdn.Bhd | ||
| 592 | |a 076720 |b 14/04/09 |c RM336.05 |d 1 |e 336.05 | ||
| 650 | 0 | 0 | |a Verilog (Computer hardware description language) |
| 650 | 0 | 0 | |a Electronic digital computers |x Computer-aided design |
| 999 | |a vtls000038641 |c 28371 |d 28371 | ||