VLSI physical design automation theory and practice
This text provides an introduction to VLSI design automation and chip layout, covering aspects of physical design, along with related areas such as automatic cell generation, silicon compilation, layout editors and compaction.
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| Format: | Book |
| Language: | English |
| Published: |
New York, NY
IEEE Press
24 cm.
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| 001 | 49626 | ||
| 003 | MY-KLNDU | ||
| 005 | 20241219005753.0 | ||
| 008 | 140328 1995 nyua bi 000 0 eng d | ||
| 020 | |a 0780311418 | ||
| 039 | 9 | |a 201408211451 |b sani |y 201403281642 |z azraai | |
| 040 | |a UPNM | ||
| 090 | |a TK 7874.75 |b .S24 1995 | ||
| 100 | 1 | |a Sait, Sadiq M. | |
| 245 | 1 | 0 | |a VLSI physical design automation |b theory and practice |c Sadiq M. Sait, Habib Youssef |
| 260 | |a New York, NY |b IEEE Press |c 24 cm. | ||
| 300 | |a xix, 426 p. |b ill. |c 24 cm. | ||
| 504 | |a Includes bibliographical references and index | ||
| 505 | |a 1. Introduction -- 2. Circuit Partitioning -- 3. Floorplanning -- 4. Placement -- 5. Grid Routing -- 6. Global Routing -- 7. Channel Routing -- 8. Layout Generation -- 9. Layout Editors and Compaction. | ||
| 520 | |a This text provides an introduction to VLSI design automation and chip layout, covering aspects of physical design, along with related areas such as automatic cell generation, silicon compilation, layout editors and compaction. | ||
| 650 | 0 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 0 | |a Electronic circuit design |x Data processing | |
| 650 | 0 | |a Computer-aided design | |
| 700 | 1 | |a Youssef, Habib | |
| 999 | |a vtls000051933 |c 49626 |d 49626 | ||


